1. Field of the Invention
The present invention relates to a method for estimating threshold voltage according to a pulse width of voltage applied to a semiconductor device (such as a nonvolatile memory transistor or cell).
2. Description of the Related Art
Generally, an Electrically Erasable Programmable Read-Only Memory (EEPROM) is representative of nonvolatile memory devices, in which data is not erased even when power is not supplied.
An EEPROM is a nonvolatile memory device in which rewriting is electrically possible, and a structure employing a floating gate cell has been widely used. Recently, with the rapid high integration of memory devices, it is very desirable to reduce the conventional floating gate cell, but high voltage is required when programming/erasing is performed and it is difficult to ensure a process margin such as tunnel definition. Therefore, it is very challenging to further reduce the size or area of a floating gate cell. On account of this, research into SONOS, FeRAM, SET, NROM, etc., has been actively conducted, which are nonvolatile memory devices that can be substituted for the floating gate cell. Of them, the SONOS (e.g., silicon-oxide-nitride-oxide-semiconductor) cell has attracted public attention as a next generation cell that can be substituted for a stacked floating gate cell.
However, since there is no special threshold voltage modeling method for a SONOS flash cell, it is impossible to estimate the variation of threshold voltage of a SONOS transistor according to the pulse width of applied voltage for all manufactured products. Therefore, it is difficult to consider the variation in device design.